Adder circuits are basic building blocks used in digital processors to perform arithmetic operations. There are different types of adder circuits that provide tradeoffs between speed and complexity. The ripple carry adder is the simplest but has the longest delay, while lookahead adders are more complex but faster by calculating carry signals earlier in parallel.
Acknowledgement Slides takenfrom http:// bwrc.eecs.berkeley.edu/IcBook/index.htm which is the web-site of “Digital Integrated Circuit – A Design Perspective” by Rabaey, Chandrakasan, Nicolic
Express Sum andCarry as a function of P, G, D Define 3 new variable which ONLY depend on A, B Generate (G) = AB Propagate (P) = A B Delete = A B Can also derive expressions for S and C o based on D and P Propagate (P) = A B Note that we will be sometimes using an alternate definition for
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The Ripple-Carry AdderWorst case delay linear with the number of bits Goal: Make the fastest possible carry path circuit t d = O( N ) t adder = ( N-1 ) t carry + t sum
The Mirror AdderThe NMOS and PMOS chains are completely symmetrical . A maximum of two series transistors can be observed in the carry-generation circuitry. When laying out the cell, the most critical issue is the minimization of the capacitance at node C o . The reduction of the diffusion capacitances is particularly important. The capacitance at node C o is composed of four diffusion capacitances, two internal gate capacitances, and six gate capacitances in the connecting adder cell . The transistors connected to C i are placed closest to the output. Only the transistors in the carry stage have to be optimized for optimal speed. All transistors in the sum stage can be minimal size.