Analog CMOS design

Analog CMOS Design
(BE E&TC)
Presented by
Puri Surekha B.
Parikrama COE,Kashti

What is an Op Amp?
• The op amp (operational amplifier) is a high gain, dc coupled amplifier
designed to
• be used with negative feedback to precisely define a closed loop transfer
function.
• The basic requirements for an op amp:
• Sufficiently large gain (the accuracy of the signal processing determines
this)
Differential inputs
• Frequency characteristics that permit stable operation when negative
feedback is
applied
Other requirements:
• High input impedance
• Low output impedance
• High speed/frequency

Operational Amplifiers
• An operational amplifier (called op-amp) is a specially-designed amplifier in
bipolar or CMOS (or BiCMOS) with the following typical characteristics:
– Very high gain (10,000 to 1,000,000)
– Differential input
– Very high (assumed infinite) input impedance
– Single ended output
– Very low output impedance
– Linear behavior (within the range of VNEG < vout < VPOS
• Op-amps are used as generic “black box” building blocks in much analog
electronic design
– Amplification
– Analog filtering
– Buffering
– Threshold detection

Generic View of Op-amp Internal Structure
• An op-amp is usually comprised of at least three different amplifier stages (see figure)
– Differential amplifier input stage with gain a1(v+ - v-) having inverting & non-inverting inputs
– Stage 2 is a “Gain” stage with gain a2 and differential or singled ended input and output
– Output stage is an emitter follower (or source follower) stage with a gain = ~1 and single-
ended output with a large current driving capability
• Simple Op-Amp Model (lower right figure):
– Two supplies VPOS and VNEG are utilized and always assumed (even if not explicitly shown)
– An input resistance rin (very high)
– An output resistance rout (very low) in series with output voltage source vo
– Linear Transfer function is vo = a1 a2(v+ - v-) = Ao(v+ - v-) where Ao is open-loop gain
– vo is clamped at VPOS or VNEG if Ao (v+ - v-) > VPOS or < VNEG, respectively

Ideal Op-amp Approximation
• Because of the extremely high voltage gain, high input
resistance, and low output resistance of an op-amp, we
use the following ideal assumptions:
– The saturation limits of v0 are equal VPOS & VNEG
– If (v+ - v-) is slightly positive, v0 saturates at VPOS;
if (v+ - v-) is slightly negative, v0 saturates at VNEG
– If v0 is not forced into saturation, then (v+ - v-)
must be very near zero and the op-amp is in its
linear region (which is usually the case for
negative feedback use)
– The input resistance can be considered infinite
allowing the assumption of zero input currents
– The output resistance can be considered to be
zero, which allows vout to equal the internal
voltage v0
• The idealized circuit model of an op-amp is shown at
the left-bottom figure
• The transfer characteristic is shown at the left-top
• Op-amps are typically used in negative feedback
configurations, where some portion of the output is

Linear Op-amp Operation: Non-Inverting Use
• An op-amp can use negative feedback to set the
closed-loop gain as a function of the circuit external
elements (resistors), independent of the op-amp gain,
as long as the internal op-amp gain is very high
• Shown at left is an ideal op-amp in a non-inverting
configuration with negative feedback provided by
voltage divider R1, R2
• Determination of closed-loop gain:
– Since the input current is assumed zero, we can
write v- = R1/(R1 + R2)vOUT
– But, since v+ =~ v- for the opamp operation in its
linear region, we can write
v- = vIN = R1/(R1 + R2)vOUT
or, vOUT = ((R1 + R2)/R1)vIN
• We can derive the same expression by writing
vOUT = A(v+- v-) = A{vIN – [R1/(R1 + R2)] vOUT}
and solving for vOUT with A>>1
Look at Example 2.1 and plot transfer curve.

The Concept of the Virtual Short
• The op-amp with negative feedback forces the two inputs v+ and v- to have the
same voltage, even though no current flows into either input.
– This is sometimes called a “virtual short”
– As long as the op-amp stays in its linear region, the output will change up or
down until v- is almost equal to v+
– If vIN is raised, vOUT will increase just enough so that v- (tapped from the
voltage divider) increases to be equal to v+ (= vIN)
• In vIN is lowered, vOUT lowers just enough to make v- = v+
– The negative feedback forces the “virtual short” condition to occur
• Look at Exercise 2.4 and 2.5
• For consideration:
– What would the op-amp do if the feedback connection were connected to
the v+ input and vIN were connected to the v- input?
• Hint: This connection is a positive feedback connection!

Linear Op-amp Operation: Inverting Configuration
• An op-amp in the inverting configuration (with
negative feedback) is shown at the left
– Feedback is from vOUT to v- through resistor R2
– vIN comes in to the v- terminal via resistor R1
– v+ is connected to ground
• Since v- = v+ = 0 and the input current is zero, we can
write
– i1 = (vIN – 0)/R1 = i2 = (0 – vOUT)/R2 or,
vOUT = - (R2/R1) vIN
• The circuit can be thought of as a resistor divider with
a virtual short (as shown below)
– If the input vIN rises, the output vOUT will fall just
enough to hold v- at the potential of v+ (=0)
– If the input vIN drops, vOUT will rise just enough
to force v- to be very near 0
• Look at Example 2.2 and Exercises 2.7-2.10

Input Resistance for Inverting and Non-inverting Op-amps
• The non-inverting op-amp configuration of slide 2-4 has an apparent input
resistance of infinity, since iIN = 0 and RIN = vIN/iIN = vIN/0 = infinity
• The inverting op-amp configuration, however, has an apparent input resistance
of R1
– since RIN = vIN/iIN = vIN/[(vIN – 0)/R1] = R1

Differential Amplifiers (Chapter 8 in Horenstein)
• Differential amplifiers are pervasive in analog electronics
– Low frequency amplifiers
– High frequency amplifiers
– Operational amplifiers – the first stage is a differential amplifier
– Analog modulators
– Logic gates
• Advantages
– Large input resistance
– High gain
– Differential input
– Good bias stability
– Excellent device parameter tracking in IC implementation
• Examples
– Bipolar 741 op-amp (mature, well-practiced, cheap)
– CMOS or BiCMOS op-amp designs (more recent, popular)

Generic CMOS Differential Amplifier
• A simple version of a CMOS differential
amplifier is shown at the left
– The load devices Q3 and Q4 are built
with PMOS transistors
– Q3 and Q4 operate as a form of current
mirror, in that the small signal current
in Q4 will be identical to the current in
Q3
– Q3 has an effective impedance looking
into its drain of 1/gm || ro3 since its
current will be a function of the voltage
on node vd1
– Q4 has an effective impedance looking
into its drain of ro4 only, since its
current will be constant and not a
function of vout
• The gain of the right hand (inverting) leg
will be higher than the gain of the left side
• Since all transistors have grounded source
operation, there is no body effect to worry

Introduction:
Current Mirrors made by using active devices have come to be
widely used in analog integrated circuits both as biasing elements
and as load devices for amplifier stages.
The current mirror uses the principle that if the gate-source
potentials of two identical MOS transistors are equal, then the
current flown through their Drain terminals should be the same.

An ideal current source/sink has infinite output impedance and,
subsequently, provides constant current over a wide operating voltage range.
the reality, however, is finite output impedance and limited output voltage
swing. also, for current mirrors, minimum input voltage requirements.if m1 and m2 are
perfectly matched, then the simple current mirror provides
if channel length modulation and mobility modulation are neglected, and SI
saturation operating is assumed. In addition, if VSS = 0V, then
Normally the values for VGS and L are selected and then W is used as a current scaling
factor. Typically VGS is chosen to provide VDS,sat of several hundred millivolts. Often
times the chosen L value is 2 to 5 times greater than the minimum Ldra to help
minimize the channel length modulation andmobility modulation effects.

The use of current mirrors in biasing can result in superior
insensitivity of circuit performance to variations in power supply
and temperature.
NMOS current mirrors are used as current sinks and PMOS
current mirrors are used as current sources.
There is variety of Current Mirror circuits available, each of them
having their own advantage and applications

The basic current mirror as shown in above figure.
Transistor M11 is operating in the saturation mode, and so is M12. In this setup,
the output current IOUT is directly related to IREF.
The drain current of a MOSFET ID is a function of both the gate-source
voltage and the drain-to-gate voltage of the MOSFET given by ID = f (VGS,
VDS).

Limitations:
 Output resistance is finite and small value.
In basic current mirror circuit we can neglect the channel length
modulation.
POWER DISSIPATION: 116.39uW

In order to suppress the effect of channel length modulation, a
cascade current source can be used.

The idea of cascode structure is employed to increase the output
resistance and the implementation requires NMOS technology.
Advantages:
High gain
High bandwidth
High slew rate
High stability and high input impedance

Limitations:
The minimum allowable voltage equal to two overdrive voltages
plus one threshold voltage.
Thus the cascade mirror wastes one threshold voltage in the
headroom.
This is the drawback of Cascode current mirror
POWER DISSIPATION:68.3217uW

Applications:
High speed data converters such as RF, A/D, D/A converters
oscillators

CONCLUSION
• Main intention of this paper is to present the simple idea of designing a new
CMOS Voltage Divider based Current Mirror, than its comparison with the
Basic and Cascode Current Mirrors. This new Mirror is well suited for low
current biasing applications. Like the Wilson and Widler current Mirror
Circuits, this new Current Mirror can be used as a Low Current Biasing
circuit. Also, when compared with Basic Current Mirror, improved one
consumes only 1/4th of the Power consumed by the Basic Current Mirror.

Modes of operation of Differential Amplifier
(DA)
• There are two modes of operations of DA
– Differential mode
– Common mode
• Differential mode:
• Two input signals are of same magnitude but
opposite polarity are used (1800 out of phase)
• Common mode
• Two input signals are of equal in magnitude and
same phase are used

INTRODUCTION
• These are widely used in the electronics industry.
• Differential amplifiers are used to amplify analog as well as
digital signals, and can be used in various implementations to
provide an output from the amplifier in response to differential
inputs.
• It is also very compatible with integrated circuit technology
and serves as the input stage to most of operational amplifier.

• The differential amplifier is often a building block or sub-
circuit used within high quality integrated circuit amplifiers,
linear and nonlinear signal processing circuits, and even
certain logic gates and digital interfacing circuits.
• CMOS differential amplifiers are used for various applications
because a number of advantages can be derived from these
types of amplifiers, as compared to single ended amplifiers.

• A fully differential amplifier circuit is a special type of
amplifier that has two inputs and two outputs.
• This device amplifies input signals on the two input lines that
are out of phase and rejects input signals that have a common
phase such as induced noise.
• The sensitivity is an important specification.
• The extra output differential voltage limits the minimum
detectable differential voltage level.

Basic Differential Amplifier
• The objective of the differential amplifier is to amplify only
the difference between two different potentials regardless of
common mode value.
• It is characterized by its CMRR and its offset voltage.
• In real differential amplifier, the output offset voltage is the
difference between the actual output voltage and the ideal
output voltage when the input terminals are connected
together.

• The differential amplifier is to amplify only the difference
between two different potentials regardless of common mode
value.
• It is characterized by its CMRR and its offset voltage. In ideal
differential amplifier, the common mode gain should be zero and
thus CMRR should be infinite, also the input offset voltage
should be zero.
• In real differential amplifier, the output offset voltage is the
difference between the actual output voltage and the ideal output
voltage when the input terminals are connected together.

Proposed differential amplifier
• The CMRR of the proposed differential amplifier is extremely
high.
• M3 and M7 forms the input stage and M2 and M1 are for the
output stage M4and M6 are used for current sink.
• In order to analysis the common mode gate of M7 and M3 is
shorted and then step input is applied for simulation.

Proposed differential amplifier

Analog CMOS design

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