ECESLU Microprocessors Lecture 3

ECESLU Microprocessors Lecture 3

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  Lecture 03 Fetchand Execute Cycle and Timing Diagrams Microcomputers and Microprocessors By: John Uffenbeck ECE @Saint Louis University, Baguio City 1 Prepared by: Engr. Jeffrey Des B. Binwag
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  Fetch and ExecuteCycle • A fundamental process that a microprocessor repeatedly performs each time it runs a program. The microprocessor: 1. Fetches the instruction byte from the address pointed to by the program counter (PC) and places it in the instruction register (IR) 2. Increments the PC by 1 3. Interprets the instruction byte in the IR and executes it accordingly 4. Repeats the process until it is instructed to stop ECE @Saint Louis University, Baguio City 2 (END)
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  Fetch and ExecuteCycle INSTRUCTION n PROGRAM INSTRUCTION 1 INSTRUCTION 2 FETCH EXECUTE OP-CODE OPERAND ECE @Saint Louis University, Baguio City 3 (END)
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  Example • Determinethe contents of register A, Address 1800, and the data bus after the execution of the following program. Determine the number of operand fetches, op-code fetches, and execute cycles. Address Mnemonics Machine Codes 8000 LD A, (1800) 3A 00 18 8003 LD B,A 48 8004 IN A, (06) DB 06 8006 ADD A, B 80 8007 RST 38 FF ECE @Saint Louis University, Baguio City 4 (END)
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  Z-80 MEMORY I/O Data Bus ECE @Saint Louis University, Baguio City 5 (END) PC = 8000 IR = CC A = DD B = FF Address Bus Control Bus 8007 = FF 8006 = 80 8005 = 06 8004 = DB 8003 = 48 8002 = 18 8001 = 00 8000 = 3A 1800 = CF 0001 = XX 0000 = XX FF = XX FE = XX 06 = 11 05 = XX 04 = XX 03 = XX 02 = XX 01 = XX 00 = XX
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  Machine Cycle TimingDiagram • A graphical representation of a program that breaks down a program as it is executed per machine cycle, while monitoring significant conditions and contents of registers, memory locations, I/O ports, and buses. ECE @Saint Louis University, Baguio City 6 (END)
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  Machine Cycles •A machine cycle is any operation in a microcomputer system that involves the activation of a control signal. Each instruction in a program can be broken down into several machine cycles. INSTRUCTION n PROGRAM INSTRUCTION 1 INSTRUCTION 2 ECE @Saint Louis University, Baguio City 7 (END) Machine Cycle 1 Machine Cycle n Machine Cycle 2
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  Example • Drawthe machine cycle timing diagram for the following program while monitoring the control signals buses, registers, memory locations, and ports involved. Address Mnemonics Machine Codes Machine Cycles 8000 LD A, (1800) 3A 00 18 LD B,A 48 IN A, (06) DB 06 ADD A, B 80 OUT (06), A D3 06 LD (1800), A 32 00 18 RST 38 FF ECE @Saint Louis University, Baguio City 8 (END)
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  Clock Cycles •Clock cycles define the amount of time it takes for an instruction to be executed. Clock Cycles are also called timing states or T-states. INSTRUCTION n PROGRAM INSTRUCTION 1 INSTRUCTION 2 Clock Cycle 1 Clock Cycle 2 Clock Cycle n ECE @Saint Louis University, Baguio City 9 (END)
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  Clock Cycles forZ-80 Instructions • The Z-80 CPU User Manual provides detailed descriptions of each instruction including the number of T-states. ECE @Saint Louis University, Baguio City 10 (END)
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  Memory Timing ECE@Saint Louis University, Baguio City 11
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  Input/Output Timing ECE@Saint Louis University, Baguio City 12
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  Program Execution Time • Ideally, the program execution time of a microprocessor depends primarily on the total number of clock cycles for all the instructions in the program without considering other parameters like propagation and buffer delays. • Program execution time, TPE TPE = Total number of clock cycles/ fclock Where: fclock = microprocessor clock speed ECE @Saint Louis University, Baguio City 13 (END)
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  • Example: Computethe program execution time for the given program. How long does it take to execute the longest instruction? Address Mnemonics Machine Codes Clock Cycles 8000 LD A, (1800) 3A 00 18 LD B,A 48 IN A, (06) DB 06 ADD A, B 80 OUT (06), A D3 06 LD (1800), A 32 00 18 RST 38 FF ECE @Saint Louis University, Baguio City 14 (END)
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  Thank You ECE@Saint Louis University, Baguio City 15