This document discusses various addressing modes and instruction formats used in computer architecture. It describes immediate, direct, indirect, register, register indirect, displacement, and stack addressing modes. It also discusses instruction formats used by processors like PDP-8, PDP-10, PDP-11, VAX, Pentium, and PowerPC that allocate bits differently based on factors like memory size, addressing modes, operands, and register sets.
Immediate Addressing
• Operandis part of instruction
• Operand = address field
• e.g. ADD 5
—Add 5 to contents of accumulator
—5 is operand
• No memory reference to fetch data
• Fast
• Limited range
Direct Addressing
• Addressfield contains address of operand
• Effective address (EA) = address field (A)
• e.g. ADD A
—Add contents of cell A to accumulator
—Look in memory at address A for operand
• Single memory reference to access data
• No additional calculations to work out
effective address
• Limited address space
Indirect Addressing
• Memorycell pointed to by address field
contains the address of (pointer to) the
operand
• EA = (A)
—Look in A, find address (A) and look there for
operand
• e.g. ADD (A)
—Add contents of cell pointed to by contents of
A to accumulator
8.
Indirect Addressing
• Largeaddress space
• 2n
where n = word length
• May be nested, multilevel, cascaded
—e.g. EA = (((A)))
– Draw the diagram yourself
• Multiple memory accesses to find operand
• Hence slower
Register Addressing
• Operandis held in register named in
address filed
• EA = R
• Limited number of registers
• Very small address field needed
—Shorter instructions
—Faster instruction fetch
11.
Register Addressing
• Nomemory access
• Very fast execution
• Very limited address space
• Multiple registers helps performance
—Requires good assembly programming or
compiler writing
—N.B. C programming
– register int a;
• c.f. Direct addressing
Register Indirect Addressing
•C.f. indirect addressing
• EA = (R)
• Operand is in memory cell pointed to by
contents of register R
• Large address space (2n
)
• One fewer memory access than indirect
addressing
Relative Addressing
• Aversion of displacement addressing
• R = Program counter, PC
• EA = A + (PC)
• i.e. get operand from A cells from current
location pointed to by PC
• c.f locality of reference & cache usage
18.
Base-Register Addressing
• Aholds displacement
• R holds pointer to base address
• R may be explicit or implicit
• e.g. segment registers in 80x86
19.
Indexed Addressing
• A= base
• R = displacement
• EA = A + R
• Good for accessing arrays
—EA = A + R
—R++
Stack Addressing
• Operandis (implicitly) on top of stack
• e.g.
—ADD Pop top two items from stack
and add
22.
Pentium Addressing Modes
•Virtual or effective address is offset into segment
—Starting address plus offset gives linear address
—This goes through page translation if paging enabled
• 12 addressing modes available
—Immediate
—Register operand
—Displacement
—Base
—Base with displacement
—Scaled index with displacement
—Base with index and displacement
—Base scaled index with displacement
—Relative
PowerPC Addressing Modes
•Load/store architecture
—Indirect
– Instruction includes 16 bit displacement to be added to
base register (may be GP register)
– Can replace base register content with new address
—Indirect indexed
– Instruction references base register and index register
(both may be GP)
– EA is sum of contents
• Branch address
—Absolute
—Relative
—Indirect
• Arithmetic
—Operands in registers or part of instruction
—Floating point is register only
Instruction Formats
• Layoutof bits in an instruction
• Includes opcode
• Includes (implicit or explicit) operand(s)
• Usually more than one instruction format
in an instruction set
27.
Instruction Length
• Affectedby and affects:
—Memory size
—Memory organization
—Bus structure
—CPU complexity
—CPU speed
• Trade off between powerful instruction
repertoire and saving space
28.
Allocation of Bits
•Number of addressing modes
• Number of operands
• Register versus memory
• Number of register sets
• Address range
• Address granularity