High voltage power module is the building block for our future power grid involving HVDC & MVDC, advanced transportation systems, and various types of renewable energy systems. The development of SiC technology provides more opportunities and challenges to the HV module development for future energy conversion. Silicon carbide (SiC) power modules have been demonstrated potential for improving power density and efficiency for low-voltage power electronics systems. However, designing MV/HV SiC power modules involves significant design challenges due to higher blocking voltage and exacerbation of side effects due to high switching dv/dt and di/dt of SiC devices-concerns that may not be as critical as in low-voltage module development. This article reviews the development of state-of-the-art MV/HV SiC power modules, ranging from 3.3 kV to 40 kV, from both industry and academia. In the first part of this paper, a discussion on SiC modules based on voltage level is presented. This is followed by a discussion of challenges associated with designing and testing MV/HV modules- including parasitic controls, electromagnetic interference (EMI), partial discharge, and thermal management-and the corresponding mitigation approaches from various perspectives. We conclude with a summary of major findings and future directions for the development of MV/HV modules.
High-Power Electronics Design Strategies
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Summary
High-power electronics design strategies involve creating systems capable of handling and managing significant electrical power while ensuring efficiency, reliability, and thermal stability. These strategies are pivotal in developing advanced energy solutions, efficient power amplifiers, and cutting-edge semiconductor technologies like SiC and GaN devices.
- Focus on thermal management: Incorporate materials and techniques, such as diamond deposition, to efficiently dissipate heat in high-power devices, ensuring sustained performance and durability.
- Address design challenges: Mitigate issues like electromagnetic interference, parasitic effects, and partial discharge to enhance the reliability of medium and high-voltage power modules.
- Utilize advanced simulation tools: Employ load pull simulations and impedance matching networks to achieve desired efficiency and gain in high-power amplifier designs.
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What's Diamond chips? 💎 - Here is an 8 Steps breakdown for all around diamond GaN’s. Stanford and UCSB researchers have achieved a major milestone: the first post-process diamond integration on a GaN HEMT RF transistor, published in Applied Physics Express (2025). -> Why it matters: GaN HEMTs are the workhorse of modern RF and radar systems—especially in the X-band (7–12GHz). But as power densities rise, so do thermal challenges. Self-heating degrades performance, reduces mobility, and shortens device lifetime. Traditional package-level cooling can’t keep up. -> What they did: The team integrated diamond—a material with ultra-high thermal conductivity—directly onto the top and sidewalls of the active GaN region. This creates a direct heat extraction path, bypassing the thermal bottlenecks of the buffer and substrate layers. -> Why it’s effective: In N-polar GaN HEMTs, the AlGaN barrier lies below the GaN channel, placing the diamond layer just 10nm away from the hot spot. That proximity makes top-side diamond one of the most effective strategies for on-die heat spreading seen to date. -> Implications: This approach could significantly enhance thermal management for high-power RF GaN amplifiers, enabling longer-range transmission, better signal quality, and lower noise—without relying solely on packaging solutions. Key takeaway: As RF GaN continues to push power and frequency limits, on-die thermal solutions like diamond deposition may become essential for sustaining reliability and efficiency in future radar and communications systems. P.S. If you're looking for semiconductor news, and insights, check out our Blog The Semiconductor world—a guide to the chip industry in simple terms. Link in comments. #Semiconductors #GaN #HEMT #RFDevices #ThermalManagement #DiamondDeposition #PowerElectronics #AdvancedMaterials #Radar #XBand #Stanford #UCSB #TestFlow #ATOMS #TechoVedas #GaNHEMT #DevicePhysics
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New Keysight ADS example for power amplifier designers that uses load pull simulation across frequency followed by matching network optimization Power amplifier designers with access to nonlinear device models often want to run load pull simulations. The resulting data can then be used to optimize impedance matching networks across frequency to attain efficiency and gain objectives at a specified output power. I have created an example that shows how to do this. The example uses an Ampleon high-power LDMOS device (other devices could be used instead.) Supported customers may download the example from the Keysight EEsof Knowledge Center (you must have a login, and login first) using the link in the comments below. Another link in the comments enables you to request an evaluation copy of ADS.